Copper Interconnect Low-K Dielectric Post-CMOS Micromachining
نویسندگان
چکیده
A post-CMOS maskless dry etch process has been developed to fabricate MEMS structures compatible with commercial low-k copper interconnect processes. The micromachining in the copper low-k process enables the fabrication of an RF inductor with quality factor of 12 at 7.5 GHz and a variable capacitor operating up to 3GHz. Reduction of fluorine concentration in the plasma for the low-k dielectric etch solves the metal delamination problems. Argon/oxygen plasma cleaning of fluorine residue from the copper surface greatly reduces the metal erosion when exposed to high humidity.
منابع مشابه
Micromachined High-Q Inductors in a 0.18- m Copper Interconnect Low-K Dielectric CMOS Process
On-chip spiral micromachined inductors fabricated in a 0.18m digital CMOS process with 6-level copper interconnect and low-K dielectric are described. A post-CMOS maskless micromachining process compatible with the CMOS materials and design rules has been developed to create inductors suspended above the substrate with the inter-turn dielectric removed. Such inductors have higher quality factor...
متن کاملMicromachined High-Q Inductors in 0.18μm Cu Interconnect Low-K CMOS Process
Spiral inductors fabricated in a 0.18μm 6-level Cu interconnect low-K dielectric process suspended 100μm above the substrate with sidewall oxide removed are described. A maskless post-CMOS micromachining process has been developed for the low-K dielectric copper interconnect process. Post-CMOS process enhancements of inductors provide higher quality factors and self-resonant frequencies by unde...
متن کاملFactorial Experiment on Cmos - Mems Rie Post Processing
CMOS-MEMS is a promising approach to achieve integration of microelectromechanical structures with circuits by using foundry CMOS services coupled with post-CMOS processing. The most significant benefit is the low cost of manufacturing the mechanical structures with CMOS. We report suitable conditions for post-CMOS processing by reactive ion etching (RIE) to define the mechanical structures. Va...
متن کاملProbing wire bond issues for bonding over Cu/low-K dielectric materials
OVERVIEW: The introduction of low-k and ultralow-k dielectric films in copper-interconnect structures presents serious challenges in test, assembly, and packaging of advanced devices. Low-k films support higher circuit speeds and enable smaller feature sizes by increasing the insulation capability around copper interconnects, but compared to previous generations of silicon-dioxide dielectric la...
متن کاملInterconnect Scaling: Signal Integrity and Performance in Future High-Speed CMOS Designs
The impact of new interconnect materials and various circuit design techniques on both performance and signal integrity in future highspeed CMOS is investigated. Specifically, this work examines the use of copper, low-k dielectrics, repeaters, driver sizing and novel design techniques with respect to crosstalk and delay in the 0.25 to 0.07 μm generations. We show crosstalk to be very important ...
متن کاملذخیره در منابع من
با ذخیره ی این منبع در منابع من، دسترسی به آن را برای استفاده های بعدی آسان تر کنید
عنوان ژورنال:
دوره شماره
صفحات -
تاریخ انتشار 2001